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Enabling Normally-Off In Situ Computing With a Magneto-Electric FET-Based SRAM Design

IEEE Transactions on Electron Devices

Publication Type



As an emerging post-CMOS Field Effect Transistor, magneto-electric field-effect transistors (MEFETs) offer compelling design characteristics for logic and memory applications, such as high-speed switching, low power consumption, and nonvolatility. In this article, for the first time, a nonvolatile MEFET-based SRAM design named ME-SRAM is proposed for edge applications which can remarkably save the SRAM static power consumption in the idle state through a fast backup-restore process. To enable normally- OFF in situ computing, the ME-SRAM cell is integrated into a novel processing-in-SRAM architecture that exploits a hardware-optimized bitline computing approach for the execution of Boolean logic operations between operands housed in a memory sub-array within a single clock cycle. Our device-to-architecture evaluation results on Binary convolutional neural network acceleration show the robust performance of ME-SRAM while reducing energy consumption on average by a factor of ∼5.3× compared to the best in-SRAM designs.


Deniz Najafi, Mehrdad Morsali, Ranyang Zhou, Arman Roohi, Andrew Marshall, Durga Misra, Shaahin Angizi

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