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Publication (2021-present)

DIAC: Design Exploration of Intermittent-Aware Computing Realizing Batteryless Systems

Conference

Design, Automation & Test in Europe Conference & Exhibition (DATE)

Ocellus: Highly Parallel Convolution-in-Pixel Scheme Realizing Power-Delay-Efficient Edge Intelligence

Conference

IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) (best paper candidate)

OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing

Conference

Design, Automation & Test in Europe Conference & Exhibition (DATE)

PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators

Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator

Conference

IEEE International Conference on Rebooting Computing (ICRC)

Design and Evaluation of a Near-Sensor Magneto-Electric FET-Based Event Detector

Journal

IEEE Transactions on Electron Devices

PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems

Journal

IEEE Transactions on Emerging Topics in Computing

A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks

Journal

IEEE Transactions on Emerging Topics in Computing

SenTer: A Reconfigurable Processing-in-Sensor Architecture Enabling Efficient Ternary MLP

Conference

Great Lakes Symposium on VLSI (GLSVLSI)

P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection

Conference

Design, Automation & Test in Europe Conference & Exhibition (DATE)

XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration

Conference

International Symposium on Quality Electronic Design (ISQED)

NeSe: Near-Sensor Event-Driven Scheme for Low Power Energy Harvesting Sensors

Conference

IEEE International Symposium on Circuits and Systems (ISCAS)

AppCiP: Energy-Efficient Approximate Convolution-in-Pixel Scheme for Neural Network Acceleration

Journal

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Design and evaluation of ultra‐fast 8‐bit approximate multipliers using novel multicolumn inexact compressors

Journal

International Journal of Circuit Theory and Applications

semiMul: Floating-Point Free Implementations for Efficient and Accurate Neural Network Training

Conference

EEE International Conference on Machine Learning and Applications (ICMLA)

LT-PIM: An LUT-based processing-in-DRAM architecture with RowHammer self-tracking

Journal

IEEE Computer Architecture Letters

HARDeNN: Hardware-assisted attack-resilient deep neural network architectures

Journal

Microprocessors and Microsystems

ReD-LUT: Reconfigurable in-DRAM LUTs enabling massive parallel computation

Conference

IEEE/ACM International Conference on Computer-Aided Design

Ocelli: Efficient Processing-in-Pixel Array Enabling Edge Inference of Ternary Neural Networks

Journal

Journal of Low Power Electronics and Applications

Toward a Behavioral-Level End-to-End Framework for Silicon Photonics Accelerators

Conference

International Green and Sustainable Computing Conference (IGSC)

TizBin: A low-power image sensor with event and object detection using efficient processing-in-pixel schemes

Conference

International Conference on Computer Design (ICCD)

Work-in-Progress: A Processing-in-Pixel Accelerator based on Multi-level HfOx ReRAM

Conference

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)

MR-PIPA: An Integrated Multilevel RRAM (HfOx)-Based Processing-In-Pixel Accelerator

Journal

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Enabling Edge Computing Using Emerging Memory Technologies: From Device to Architecture

Book

Frontiers of Quality Electronic Design (QED) AI, IoT and Hardware Security

Enabling intelligent iots for histopathology image analysis using convolutional neural networks

Journal

Micromachines

Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell

Conference

IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS)

Enabling Efficient Training of Convolutional Neural Networks for Histopathology Images

Journal

International Conference on Image Analysis and Processing

Flexidram: A flexible in-dram framework to enable parallel general-purpose computation

Conference

ACM/IEEE International Symposium on Low Power Electronics and Design

Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network

Conference

IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations

Conference

IEEE 15th Dallas Circuit And System Conference (DCAS)

SCiMA: A Generic Single-Cycle Compute-in-Memory Acceleration Scheme for Matrix Computations

Conference

IEEE International Symposium on Circuits and Systems (ISCAS)

Integrated sensing and computing using energy-efficient magnetic synapses

Conference

International Symposium on Quality Electronic Design (ISQED)

ReFACE: efficient design methodology for acceleration of digital filter implementations

Conference

International Symposium on Quality Electronic Design (ISQED)

RNSiM: Efficient Deep Neural Network Accelerator Using Residue Number Systems

Conference

IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Processing-in-Memory Acceleration of MAC-based Applications Using Residue Number System: A Comparative Study

Conference

Great Lakes Symposium on VLSI (GLSVLSI)

Entropy-Based Modeling for Estimating Adversarial Bit-flip Attack Impact on Binarized Neural Network

Conference

Asia and South Pacific Design Automation Conference (ASP-DAC)

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