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RACSen: Residue Arithmetic and Chaotic Processing in Sensors to Enhance CMOS Imager Security

Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI) 2024

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The widespread adoption of vision sensors raises significant security and privacy concerns. In this paper, we present RACSen as a novel architecture that can increase the security and efficiency of conventional image sensors. RACSen leverages the intricate mathematical properties of the residue number system (RNS) with analog scrambling techniques to create a sophisticated dual-layered encryption mechanism. Incorporating RNS within analog-to-digital converters further strengthens security by mitigating replay attacks and preserving data transmission integrity and confidentiality. Our results demonstrate exceptional encryption, with a perfect pixel change rate of 99.90 and high intensity change of 45.77. This offers robust image data protection with minimal overhead of 11.11%.


Sepehr Tabrizchi, Nedasadat Taheri, Shaahin Angizi, Arman Roohi

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