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Brain-Inspired Neuromorphic Computing & Accelerator Design for Deep Neural Network:

Human brains are vastly more energy efficient at interpreting the world visually or understanding speech than any CMOS-based computer system of the same size. Neuromorphic computing can perform human-like cognitive computing, such as vision, classification, and inference. The fundamental computing units of the artificial neural networks are the neurons that connect to each other and external stimuli through programmable connections called synapses. The basic operation of an artificial neuron is summing the N weighted inputs and passing the result through a transfer (activation) function. Such neuron and synapse functions can be efficiently implemented using different emerging post-CMOS device technologies. My research in this area includes:

  • Physical modeling of nanoscale emerging devices for potential neuron or synapse applications, such as spin-transfer torque devices, domain wall motion devices, spin-Hall effect, and memristors

  • Exploration of various neuromorphic computing models, such as Deep Learning Convolutional Neural Network, Spiking Neural Network, Hierarchical Temporal Memory, Oscillatory Neural Network, etc

  • Cross-layer (device/ circuit/ architecture) co-design for implementing complex machine learning tasks, such as pattern/ speech recognition


Deep Learning Neural Network, Security of Neural Networks, and Adversarial Learning: 

Deep Neural Networks (DNNs) have achieved great success in various tasks, including but not limited to image classification, speech recognition, machine translation, and autonomous driving. Despite the remarkable progress, recent studies have shown that DNNs are vulnerable to adversarial examples. In image classification, an adversarial example is a carefully crafted image that is visually imperceptible to the original image but can cause the DNN model to misclassify. In addition to image classification, attacks on other DNN-related tasks have also been actively investigated, such as visual QA, image captioning, semantic segmentation, machine translation, speech recognition, and medical prediction. My research in this area includes:

  • Develop machine learning algorithms to derive models used for electronic design automation

  • Implement automated and general methodologies to simultaneously reduce DNN model size and computing complexity while maintaining state-of-the-art accuracy

  • Explore general methodologies to improve the robustness of artificial intelligence

  • Explore countermeasures for adversarial attacks including classification such as the fast gradient sign method and beyond classification/recognition such as attacks on autoencoders and generative models


Over past decades, the amount of data that is required to be processed and analyzed by the computing systems has been increasing dramatically to exascale, which brings grand challenges for state-of-the-art computing systems to simultaneously deliver energy-efficient and high-performance computing solutions. Such challenges mainly come from the well-known power wall (i.e. huge leakage power consumption limits the performance growth when technology scales down) and memory wall (including long memory access latency, limited memory bandwidth, and energy-hungry data transfer). Therefore, there is a great need to leverage innovations from both circuit design and computing architecture to build an energy-efficient and high-performance non-Von-Neumann computing platform. In-memory computing has been proposed as a promising solution to reduce massive power-hungry data traffic between computing and memory units, leading to significant improvement in entire system performance. My research focuses on: 

  • Explore various in-memory logic circuit designs based on existing memory technologies, including SRAM, DRAM, Magnetic (Spintronic) Memory, Resistive RAM, with low overhead, efficient operation, low latency, etc

  • Explore dual-mode in-memory computing architecture designs that could simultaneously work as memory and in-memory computing units to greatly reduce data communication, fully leverage the highly parallel computing ability of processing-in-memory architecture, and thus improve system performance

  • Explore suitable in-memory computing applications that could be either fully implemented or pre-processed in the proposed in-memory computing platform, including deep neural network, data encryption, image processing, graph processing, bioinformatics, etc

Ultra-Low Power In-Memory Computing:

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